First results of an "artificial retina" processor prototype

We report on the performances of a prototype for a specialized processor capable of reconstructing charged-particle tracks in a realistic Large Hadron Collider (LHC) detector, at full readout speed and with sub-microsecond latency. The processor is based on an innovative pattern recognition, called artificial retina algorithm, inspired by the vision system of the mammals. A prototype system has been designed, simulated, and implemented on readout boards equipped with Altera Stratix III FPGA devices. This is an important step towards the realization of a real-time track reconstruction device capable of processing complex events of high-luminosity LHC experiments at 40 MHz crossing rate.