We report on the performance of a specialized processor capable of reconstructing charged particle tracks in a realistic LHC silicon tracker detector, at the same speed of the readout and with sub-microsecond latency. The processor is based on an innovative pattern-recognition algorithm, called "artificial retina algorithm", inspired from the vision system of mammals. A prototype of the processor has been designed, simulated, and implemented on Tel62 boards equipped with high-bandwidth Altera Stratix III FPGA devices. The prototype is the first step towards a real-time track reconstruction device aimed at processing complex events of high-luminosity LHC experiments at 40 MHz crossing rate.
Titolo: | First Results of an "Artificial Retina" Processor Prototype | |
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Data di pubblicazione: | 2016 | |
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Digital Object Identifier (DOI): | http://dx.doi.org/10.1051/epjconf/201612700005 | |
Handle: | http://hdl.handle.net/11384/66137 | |
Appare nelle tipologie: | 1.1 Articolo in rivista |